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  march 2007 rev 2 1/13 1 STA516B 60 v 6 a quad power half bridge features minimum input output pulse width distortion 200 m ? r dson complementary dmos output stage cmos compatible logic inputs thermal protection thermal warning output under voltage protection description STA516B is a monolithic quad half bridge stage in multipower bcd technology. the device can be used as dual bridge or reconfigured, by connecting config pin to vdd pin, as single bridge with double current capability, and as half bridge (binary mode) with half current capability. the device is particularly designed to make the output stage of a stereo all-digital high efficiency (ddx?) amplifier capable to deliver 160 + 160 w @ thd = 10 % at v cc 50 v output power on 8 ? load and 320 w @ thd = 10 % at v cc 50v on 4 ? load in single btl configuration. the input pins have threshold proportional to v l pin voltage. power so36 slug up table 1. device summary part number package packaging STA516B power so36 slug up tube STA516B13tr power so36 slug up tape and reel www.st.com
contents STA516B 2/13 contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin lists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 power supply and control sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 mechanical and package data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STA516B introduction 3/13 1 introduction figure 1. application circuit (dual btl) l18 22 h l19 22 h c30 1 f c20 100nf c99 100nf c101 100nf c107 100nf c106 100nf c23 470nf c55 1000 f c21 100nf c58 100nf c58 100nf r57 10k r59 10k r63 20 r98 6 r100 6 c53 100nf c60 100nf c31 1 f c52 330pf r104 20 c109 330pf 15 m3 in1a in1a v l config pwrdn pwrdn fault tri-state th_war th_war +3.3v in1b v dd v dd v ss v ss v cc sign v cc sign gnd-reg gnd-clean in2a in1b in2a in2b protections & logic regulators 29 23 24 25 27 26 28 30 21 22 33 34 35 36 m2 m5 m4 17 16 out1a gnd1a out1a v cc 1a 14 12 10 11 out1b gnd1b out1b v cc 1b 13 l113 22 h l112 22 h c32 1 f +v cc c108 470nf c33 1 f 7 m17 m15 m16 m14 8 9 out2a gnd2a out2a v cc 2a 6 4 2 3 out2b gnd2b d00au1148b out2b v cc 2b 5 19 31 20 gndsub 1 in2b 32 c110 100nf c111 100nf r103 6 r102 6 8 ? 8 ?
pin lists STA516B 4/13 2 pin lists table 2. pin function number pin description 1 gnd-sub substrate ground 2, 3 out2b output half bridge 2b 4 vcc2b positive supply 5 gnd2b negative supply 6 gnd2a negative supply 7 vcc2a positive supply 8, 9 out2a output half bridge 2a 10, 11 out1b output half bridge 1b 12 vcc1b positive supply 13 gnd1b negative supply 14 gnd1a negative supply 15 vcc1a positive supply 16, 17 out1a output half bridge 1a 18 nc not connected 19 gnd-clean logical ground 20 gnd-reg ground for regulator vdd 21, 22 vdd 5 v regulator referred to ground 23 v l high logical state setting voltage 24 config configuration pin 25 pwrdn stand-by pin 26 tri-state hi-z pin 27 fault fault pin advisor 28 th-war thermal warning advisor 29 in1a input of half bridge 1a 30 in1b input of half bridge 1b 31 in2a input of half bridge 2a 32 in2b input of half bridge 2b 33, 34 vss 5 v regulator referred to +vcc 35, 36 vcc sign signal positive supply
STA516B pin lists 5/13 figure 2. pin connection table 3. functional pin status pin name logical value status fault 0 fault detected (short circuit or thermal for example) fault (1) 1. the pin is open collector. to hav e the high logic value, it needs to be pulled up by a resistor. 1 normal operation tri-state 0 all powers in hi-z state tri-state 1 normal operation pwrdn 0 low absorption pwrdn 1 normal operation thwar 0 temperature of the ic =130 o c thwar ( 1 ) 1 normal operation config 0 normal operation config (2) 2. to put config = 1 means connect pi n 24 (config) to pins 21, 22 (vdd) 1 out1a=out1b; out2a=out2b (if in1a = in1b; in2a = in2b) gnd-sub out2b out2b v cc 2b gnd1b v cc 1a gnd1a out1a out1a gnd-reg v dd v dd config v ss v ss v cc sign v cc sign 18 16 17 15 6 5 4 3 2 21 22 31 32 33 35 34 36 20 1 19 n.c. gnd-clean d01au1273 out1b v cc 1b out1b pwrdn fault tri-state 9 8 7 28 29 30 out2a th_war 10 27 gnd2b out2a v cc 2a in1a in2b in1b 14 12 11 23 25 26 gnd2a in2a 13 24 v l
electrical characteristics STA516B 6/13 3 electrical characteristics table 4. absolute maximum ratings symbol parameter value unit v cc dc supply voltage (pins 4,7,12,15) 60 v v max maximum voltage on pins 23 to 32 5.5 v t op operating temperature range 0 to 70 c t stg , t j storage and junction temperature -40 to 150 c table 5. thermal data symbol parameter min. typ. max. unit t j-case thermal resistance junction to case (thermal pad) 1 2.5 c/w t jsd thermal shut-down junction temperature 150 c t warn thermal warning temperature 130 c t hsd thermal shut-down hysteresis 25 c table 6. electrical characteristics (vl= 3.3 v; vcc = 50 v; tamb = 25 c unless otherwise specified) symbol parameter test conditions min. typ. max. unit r dson power pchannel/nchannel mosfet r dson id=1a 200 240 m ? i dss power pchannel/nchannel leakage idss 100 a g n power pchannel r dson matching id=1a 95 % g p power nchannel r dson matching id=1a 95 % dt_s low current dead time (static) see figure 4 10 20 ns dt_d high current dead time (dynamic) l=22 h, c = 470nf rl = 8 ? , id=4.5a see figure 5 50 ns t d on turn-on delay time resistive load 100 ns t d off turn-off delay time resistive load 100 ns t r rise time resistive load see figure 4 25 ns t f fall time resistive load see figure 4 25 ns v cc supply operating voltage 10 52 v v in-high high level input voltage v l /2 +300mv v v in-low low level input voltage v l /2 -300mv v i in-h high level input current pin voltage = v l 1 a i in-l low level input current pin voltage = 0.3 v 1 a
STA516B electrical characteristics 7/13 i pwrdn-h high level pwrdn pin input current v l = 3.3 v 35 a v low low logical state voltage vl (pin pwrdn, tristate)(see ta bl e 7 ) v l = 3.3 v 0.8 v v high high logical state voltage vh (pin pwrdn, tristate)(see ta bl e 7 ) v l = 3.3 v 1.7 v i vcc- pwrdn supply current from vcc in power down pwrdn = 0 3 ma i fault output current pins fault -th-warn when fault conditions vpin = 3.3 v 1 ma i vcc-hiz supply current from vcc in tristate tristate = 0 22 ma i vcc supply current from vcc in operation both channel switching) input pulse width = 50 % duty switching frequency = 384 khz; no lc filters 70 ma i out-sh over current protection threshold isc (short circuit current limit) 1 (1) 6810 a v uv under voltage protection threshold 7 v v ov over voltage protection threshold 60 70 v t pw_min output minimum pulse width no load 25 40 ns 1. see specific application note number: an1994. table 6. electrical characteristics (continued) (vl= 3.3 v; vcc = 50 v; tamb = 25 c unless otherwise specified) symbol parameter test conditions min. typ. max. unit table 7. vlow, vhigh variation with vl v l vlow min vhigh max unit 2.7 0.7 1.5 v 3.3 0.8 1.7 v 5 0.85 1.85 v table 8. logic truth table (see figure 2 ) tristate inxa inxb q1 q2 q3 q4 output mode 0 x x off off off off hi-z 1 0 0 off off on on dump 1 0 1 off on on off negative 1 1 0 on off off on positive 1 1 1 on on off off not used
power supply and control sequencing STA516B 8/13 4 power supply and control sequencing to guarantee correct operatio n and reliability, a correct tu rn on/off sequen ce must be followed. figure 3 shows the correct power on sequence. figure 3. correct power-on sequence vcc must turn on before v l in order to prevent uncontrolled current flowing through an internal protection diode connected between v l (logic supply) and vcc (high power supply). failure to do so could result in damage to the device. pwrdn must be released after v l is switched on. an input signal can then be sent to the power stage. pwrdn in v cc v l v cc > v l v t t t
STA516B test 9/13 5 test figure 4. test circuit figure 5. current dead time test circuit low current dead time = max(dtr,dtf) outxy vcc (3/4)vcc (1/2)vcc (1/4)vcc t dtf dtr duty cycle = 50% inxy outxy gnd +vcc m58 m57 r 8 ? + - v67 = vdc = vcc/2 d03au1458 high current dead time for bridge application = abs(dtout(a)-dtin(a))+abs(dtout(b)-dtin(b)) +v cc rload=8 ? q2 outxb dtout(b) dtin(b) dtout(a) c71 470nf c70 470nf c69 470nf iout=4.5a iout=4.5a q4 q1 q3 m64 inxb m63 d00au1162 m58 inxa m57 dtin(a) duty cycle=a duty cycle=b duty cycle a and b: fixed to have dc output current of 4.5a in the direction shown in figure l68 22 l67 22 outxa
test STA516B 10/13 figure 6. typical single btl configuratio n to obtain 320 w @ thd 10 %, rl = 4 w, vcc = 50 v (a) figure 7. typical quad half bridge configuration for more information, refer to the application note ?st50x and sta51x digital power amplifiers?. a. a pwm modulator as driver is required. this result was obtained using the sta30x+sta50x demo board. 12 h 12 h 100nf film 100nf x7r 100nf x7r 1 f x7r 2200 f 63v 680nf film 100nf film 100nf 10k 10k 6.2 1/2w 6.2 1/2w 100nf x7r 100nf x7r add. in1a in1a v l config pwrdn npwrdn fault tri-state th_war th_war +3.3v 100nf 100nf x7r in1b v dd v dd v ss v ss v cc sign v cc sign gnd-reg gnd-clean in1b in2a 29 23 n.c. 24 25 27 26 28 30 21 22 33 34 35 36 17 16 18 out1a gnd1b out1a v cc 1b 10 13 11 out1b gnd1a out1b 14 +36v 330pf 22 ? 1/2w 4 ? gnd2a 6 2 12 v cc 1a 15 v cc 2b 4 v cc 2a 7 3 out2b gnd2b d04au1545 out2b 5 19 31 20 gndsub 1 in2b 32 8 9 out2a out2a 1 f x7r +36v l11 22 h l12 22 h c51 1 f c71 100nf c91 1 f c81 100nf c31 820 f c21 2200 f c58 100nf c58 100nf r57 10k r59 10k r41 20 r61 5k r62 5k r51 6 c53 100nf c60 100nf c61 100nf 15 m3 in1a in1a v l config pwrdn pwrdn fault tri-state th_war th_war +3.3v in1b v dd v dd v ss v ss v cc sign v cc sign gnd-reg gnd-clean in2a in1b in2a in2b protections & logic regulators 29 23 24 25 27 26 28 30 21 22 33 34 35 36 m2 m5 m4 17 16 outpl pgnd1p outpl v cc 1p 14 12 10 11 outnl pgnd1n outnl v cc 1n 13 c52 1 f +v cc c62 100nf 7 m17 m15 m16 m14 8 9 outpr pgnd2p outpr v cc 2p 6 4 2 3 outnr pgnd2n d03au1474 outnr v cc 2n 5 19 31 20 gndsub 1 in2b 32 c72 100nf c92 1 f c82 100nf r52 6 c41 330pf r42 20 c42 330pf c32 820 f l13 22 h l14 22 h c73 100nf c93 1 f c83 100nf c33 820 f r43 20 r53 6 c74 100nf c94 1 f c84 100nf r54 6 c43 330pf r44 20 c44 330pf c34 820 f r63 5k r64 5k r65 5k r66 5k r67 5k r68 5k 4 ? 4 ? 4 ? 4 ?
STA516B mechanical and package data 11/13 6 mechanical and package data figure 8. power so36 (slug up) mechanical data and package dimension outline and mechanical data m. mm inch min. typ. max. min. typ. max. a 3.25 3.43 0.128 0.135 a2 3.1 3.2 0.122 0.126 a4 0.8 1 0.031 0.039 a5 0.2 0.008 a1 0.030 -0.040 0.0011 -0.0015 b 0.22 0.38 0.008 0.015 c 0.23 0.32 0.009 0.012 d 15.8 16 0.622 0.630 d1 9.4 9.8 0.37 0.38 d2 1 0.039 e 13.9 14.5 0.547 0.57 e1 10.9 11.1 0.429 0.437 e2 2.9 0.114 e3 5.8 6.2 0.228 0.244 e4 2.9 3.2 0.114 1.259 e0.65 0.026 e3 11.05 0.435 g 0 0.075 0 0.003 h 15.5 15.9 0.61 0.625 h 1.1 0.043 l 0.8 1.1 0.031 0.043 n 10? 10? s8?8? (1) ?d and e1? do not include mold flash or protusions. mold flash or protusions shall not exceed 0.15mm (0.006?) (2) no intrusion allowed inwards the leads. di powerso36 (slug up) 7183931 d
revision history STA516B 12/13 7 revision history table 9. document revision history date revision changes 01-feb-2007 1 initial release 19-mar-2007 2 update to re flect product maturity.
STA516B 13/13 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2007 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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